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ICS87004AGT中文资料ICST数据手册PDF规格书

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厂商型号

ICS87004AGT

功能描述

1:4, DIFFERENTIAL-TO-LVCMOS/LVTTL ZERO DELAY CLOCK GENERATOR

文件大小

185.16 Kbytes

页面数量

14

生产厂商

ICST

网址

网址

数据手册

下载地址一下载地址二

更新时间

2025-11-29 9:40:00

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ICS87004AGT规格书详情

GENERAL DESCRIPTION

The ICS87004 is a highly versatile 1:4 Differentialto-LVCMOS/LVTTL Clock Generator and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS87004 has two selectable clock inputs. The CLK0, nCLK0 and CLK1, nCLK1 pairs can accept most standard differential input levels. Internal bias on the nCLK0 and nCLK1 inputs allows the CLK0 and CLK1 inputs to accept LVCMOS/LVTTL.

FEATURES

• 4 LVCMOS/LVTTL outputs, 7Ω typical output impedance

• Selectable CLK0, nCLK0 or CLK1, nCLK1 clock inputs

• CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL

• Internal bias on nCLK0 and nCLK1 to support LVCMOS/LVTTL levels on CLK0 and CLK1 inputs

• Output frequency range: 15.625MHz to 250MHz

• Input frequency range: 15.625MHz to 250MHz

• VCO range: 250MHz to 500MHz

• External feedback for “zero delay” clock regeneration with configurable frequencies

• Programmable dividers allow for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8

• Fully integrated PLL

• Cycle-to-cycle jitter: 45ps (maximum)

• Output skew: 45ps (maximum)

• Static phase offset: 50 ± 125ps (3.3V ± 5)

• Full 3.3V or 2.5V operating supply

• 5V tolerant inputs

• Lead-Free package available

• Industrial temperature information available upon request

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