丝印：ICS83940DYIL；Package：LQFP；Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer

Features • Eighteen LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew

文件：582.47 Kbytes 页数：17 Pages

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瑞萨

丝印：ICS83940DYIL；Package：LQFP；Low Skew, 1 to 18 LVPECL to LVCMOS/LVTTL Fanout Buffer

Features • Eighteen LVCMOS/LVTTL outputs • Selectable LVCMOS_CLK or LVPECL clock inputs • PCLK, nPCLK pair can accept the following differential input levels: LVPECL, CML, SSTL • LVCMOS_CLK supports the following input types: LVCMOS or LVTTL • Maximum output frequency: 250MHz • Output skew

文件：582.47 Kbytes 页数：17 Pages

RENESAS

瑞萨

LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS83940DI is a low skew, 1-to-18 LVPECLto-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83940DI has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. Th

文件：112.16 Kbytes 页数：13 Pages

ICST

LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS83940D is a low skew, 1-to-18 LVPECLto-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83940D has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The

文件：296.94 Kbytes 页数：15 Pages

ICST

LOW SKEW, 1-TO-18 LVPECL-TO-LVCMOS / LVTTL FANOUT BUFFER

GENERAL DESCRIPTION The ICS83940D is a low skew, 1-to-18 LVPECLto-LVCMOS/LVTTL Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS. The ICS83940D has two selectable clock inputs. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The

文件：296.94 Kbytes 页数：15 Pages

ICST