ICS551集成电路（IC）的时钟缓冲器驱动器规格书PDF中文资料

描述 Description

The ICS551 is a low cost, high speed single input to four output clock buffer. Part of ICS’ Clock Blocks™ family, this is our lowest cost, small clock buffer. See the ICS552-01B for a monolithic dual version of the ICS551 in a 20 pin QSOP. ICS makes many non-PLL and PLL based low skew output devices, as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.

特性 Features

• Packaged in 8 pin SOIC

• Low cost clock buffer

• Low skew (250ps) outputs

• Input/output clock frequency up to 160 MHz

• Operating voltages of 3.0 to 5.5 V

• Non-inverting

• Ideal for networking clocks

• Output Enable mode tri-states outputs

• Full CMOS clock swings with 25mA drive capability at TTL levels

• Advanced, low power CMOS process