Clock Slicer??User Configurable Zero Delay Buffer

Description The ICS527-01 Clock Slicer™ is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplica

文件：113.41 Kbytes 页数：8 Pages

ICST

Package：28-SSOP（0.154"，3.90mm 宽）；包装：管件 类别：集成电路（IC） 时钟发生器，PLL，频率合成器 描述：IC CLOCK SLICER ZD BUFFER 28SSOP

Renesas Electronics America Inc

Clock Slicer??User Configurable Zero Delay Buffer

Description The ICS527-01 Clock Slicer™ is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplica

文件：113.41 Kbytes 页数：8 Pages

ICST

CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

Description The ICS527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplicat

文件：116.74 Kbytes 页数：11 Pages

IDT

Clock Slicer??User Configurable Zero Delay Buffer

Description The ICS527-01 Clock Slicer™ is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplica

文件：113.41 Kbytes 页数：8 Pages

ICST

Clock Slicer??User Configurable Zero Delay Buffer

Description The ICS527-01 Clock Slicer™ is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplica

文件：113.41 Kbytes 页数：8 Pages

ICST

丝印：ICS527R-01ILF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • Pin configurable multiplication/division ratio • Slices frequency or period • SYNC pulse output indicates aligned edges • Input clock frequency of 600 kHz to 200 MHz • Output clock frequencies

文件：280.25 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：ICS527R-01ILF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • Pin configurable multiplication/division ratio • Slices frequency or period • SYNC pulse output indicates aligned edges • Input clock frequency of 600 kHz to 200 MHz • Output clock frequencies

文件：280.25 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：ICS527R-01LF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • Pin configurable multiplication/division ratio • Slices frequency or period • SYNC pulse output indicates aligned edges • Input clock frequency of 600 kHz to 200 MHz • Output clock frequencies

文件：280.25 Kbytes 页数：12 Pages

RENESAS

瑞萨

丝印：ICS527R-01LF；Package：SSOP；CLOCK SLICER USER CONFIGURABLE ZERO DELAY BUFFER

Features • Packaged as 28-pin SSOP (150 mil body) • Synchronizes fractional clocks rising edges • Pin configurable multiplication/division ratio • Slices frequency or period • SYNC pulse output indicates aligned edges • Input clock frequency of 600 kHz to 200 MHz • Output clock frequencies

文件：280.25 Kbytes 页数：12 Pages

RENESAS

瑞萨