PECL Clock Synthesizer

Description The ICS507-01 and ICS507-02 are inexpensive ways to generate a low jitter 155.52 MHz (or other high speed) differential PECL clock output from a low frequency crystal input. Using Phase-Locked-Loop (PLL) techniques, the devices use a standard fundamental mode crystal to produce out

文件：49.61 Kbytes 页数：5 Pages

ICST

PECL Clock Synthesizer

Description The ICS507-01 and ICS507-02 are inexpensive ways to generate a low jitter 155.52 MHz (or other high speed) differential PECL clock output from a low frequency crystal input. Using Phase-Locked-Loop (PLL) techniques, the devices use a standard fundamental mode crystal to produce out

文件：49.61 Kbytes 页数：5 Pages

ICST

TSSOP20

ICS

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