HY628100A中文资料128Kx8bit CMOS SRAM数据手册SK hynix规格书

描述 Description

DESCRIPTION
The HY628100A is a high speed, low power and 1M bit CMOS Static Random Access Memory organized as 131,072 words by 8bit. The HY628100A uses high performance CMOS process technology and designed for  high speed low power circuit technology. It is  particulary well
suited for used in  high density low power system application. This device has a data retention
mode that guarantees data to remain valid at a minimum power supply voltage of 2.0V.FEATURES
·  Fully static operation and Tri-state output
·  TTL compatible inputs and outputs
·  Battery backup(L/LL-part)
- 2.0V(min) data retention
·  Standard pin configuration
- 32pin 525mil SOP
- 32pin 8x20mm TSOP-I (Standard)

特性 Features

·  Fully static operation and Tri-state output
·  TTL compatible inputs and outputs
·  Battery backup(L/LL-part)
- 2.0V(min) data retention
·  Standard pin configuration
- 32pin 525mil SOP
- 32pin 8x20mm TSOP-I (Standard)