256M LVTTL interface SDRAM 100 MHz 1-Mword x 64-bit x 4-bank/2-Mword x 32-bit x 4-bank PC/100 SDRAM

Description The Hitachi HM5225645F is a 256-Mbit SDRAM organized as 1048576-word × 64-bit × 4-bank. The Hitachi HM5225325F is a 256-Mbit SDRAM organized as 2097152-word × 32-bit × 4-bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 108 bum

文件：81.8 Kbytes 页数：16 Pages

HITACHIHitachi Semiconductor

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256M LVTTL interface SDRAM 100 MHz 1-Mword x 64-bit x 4-bank/2-Mword x 32-bit x 4-bank PC/100 SDRAM

Description The Hitachi HM5225645F is a 256-Mbit SDRAM organized as 1048576-word × 64-bit × 4-bank. The Hitachi HM5225325F is a 256-Mbit SDRAM organized as 2097152-word × 32-bit × 4-bank. All inputs and outputs are referred to the rising edge of the clock input. It is packaged in standard 108 bum

文件：81.8 Kbytes 页数：16 Pages

HITACHIHitachi Semiconductor

日立日立公司

TSSOP

日立

上传：深圳市勤思达科技有限公司

DIP28

HIT

上传：谛辉(北京/上海/青岛 )电子科技有限公司

DIP-28

HITACHIHitachi Semiconductor

日立日立公司

上传：深圳市恒达亿科技有限公司