Quad. Bus Buffer Gates (with 3-state outputs)

Description The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to be low to put the output into high impedance. Features • LSTTL Output Logic Level Com

文件：94.23 Kbytes 页数：9 Pages

RENESAS

瑞萨

Quad. Bus Buffer Gates (with 3-state outputs)

Description The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to be low to put the output into high impedance. Features • LSTTL Output Logic Level Com

文件：94.23 Kbytes 页数：9 Pages

RENESAS

瑞萨

QUAD 3-STATE NONINVERTING BUFFERS

QUAD 3-STATE NONINVERTING BUFFERS High-Performance Silicon-Gate CMOS The IN74HCT126A is identical in pinout to the LS/ALS126. The IN74HCT126A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The IN74HCT126A noninverting buffers are designed to be us

文件：135.75 Kbytes 页数：5 Pages

INTEGRAL

Integral Corp.

Quad 3-State Noninverting Buffers High-Performance Silicon-Gate CMOS

The IN74HCT126A is identical in pinout to the LS/ALS126. The IN74HCT126A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. The IN74HCT126A noninverting buffers are designed to be used with 3-state memory address drivers, clock drivers, and other bus-o

文件：199.08 Kbytes 页数：6 Pages

IKSEMICON