Dual D-type Flip-Flops (with Preset and Clear)

Description The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at thte data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by

文件：58.03 Kbytes 页数：9 Pages

HitachiHitachi Semiconductor

日立日立公司

Dual D-type Flip-Flops (with Preset and Clear)

HITACHI

日立

Dual D-type Flip-Flops (with Preset and Clear)

Description The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by a

文件：108.32 Kbytes 页数：8 Pages

RENESAS

瑞萨

Dual D-type Flip-Flops (with Preset and Clear)

文件：169.7 Kbytes 页数：10 Pages

RENESAS

瑞萨

Dual D-type Flip-Flops (with Preset and Clear)

Description The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are independent of the clock and accomplished by a

文件：108.32 Kbytes 页数：8 Pages

RENESAS

瑞萨