HD74HC356RPEL中文资料瑞萨数据手册PDF规格书

描述 Description

This data selectors/multiplexers contain full on-chip binary decoding to select one of eight data sources. The data select address is stored in transparent latches that are enabled by a low level address on pin 11, Select Control. Data on the 8 input lines is stored in a parallel input/output register which in the HD74HC356 is composed of 8 edge-triggered flipflops, clocked by a low to high transition on pin 9, clock. Both true (Y) and complementary (W) 3-state outputs are available.

特性 Features

• High Speed Operation: tpd (Clock to W, Y) = 27 ns typ (CL = 50 pF)

• High Output Current: Fanout of 15 LSTTL Loads

• Wide Operating Voltage: VCC = 2 to 6 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)