HD74HC354FPEL中文资料瑞萨数据手册PDF规格书

描述 Description

This data selectors/multiplexers contains full on-chip binary decoding to select one of eight data sources. The data

select address is stored in transparent latches that are enabled by a low level address on pin 11, Select Control. Data on the 8 input lines is stored in a parallel input/output register which in the HD74HC354 iscomposed of 8 transparent latches enabled by a low level on pin 9, Data Control. Both true (Y) and complementary (W) 3-state outputs are available.

特性 Features

• High Speed Operation: tpd(DCto W, Y) = 23 ns typ (CL= 50 pF)

• High Output Current: Fanout of 15 LSTTL Loads

• Wide Operating Voltage: VCC= 2 to 6 V

• Low Input Current: 1 µA max

• Low Quiescent Supply Current: ICC(static) = 4 µA max (Ta = 25°C)