4-bit Parallel-Access Shift Register

Description This shift register features parallel inputs, parallel outputs, J-K serial inputs, Shift/Load control input, and a direct overriding clear. This shift register can operate in two modes: Parallel load; Shift from Q0 towards Q3. Features • Shift Right and Parallel Load Capability • J

文件：217.76 Kbytes 页数：8 Pages

RENESAS

瑞萨

4-bit Parallel-Access Shift Register

Description This shift register features parallel inputs, parallel outputs, J-K serial inputs, Shift/Load control input, and a direct overriding clear. This shift register can operate in two modes: Parallel load; Shift from Q0 towards Q3. Features • Shift Right and Parallel Load Capability • J

文件：217.76 Kbytes 页数：8 Pages

RENESAS

瑞萨

4-bit Parallel-Access Shift Register

Description This shift register features parallel inputs, parallel outputs, J-K serial inputs, Shift/Load control input, and a direct overriding clear. This shift register can operate in two modes: Parallel load; Shift from Q0 towards Q3. Features • Shift Right and Parallel Load Capability • J

文件：217.76 Kbytes 页数：8 Pages

RENESAS

瑞萨

4-bit Parallel-Access Shift Register

Description This shift register features parallel inputs, parallel outputs, J-K serial inputs, Shift/Load control input, and a direct overriding clear. This shift register can operate in two modes: Parallel load; Shift from Q 0 towards Q3. Features • Shift Right and Parallel Load Capability •

文件：67.57 Kbytes 页数：11 Pages

HITACHIHitachi Semiconductor

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