8-bit Shift Register

Description The HD74AC166/HD74ACT166 is an 8-bit, serial or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs a

文件：65.7 Kbytes 页数：11 Pages

HITACHIHitachi Semiconductor

日立日立公司

8-bit Shift Register

Description The HD74AC166/HD74ACT166 is an 8-bit, serial or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs a

文件：226.88 Kbytes 页数：9 Pages

RENESAS

瑞萨

Standard IC>General-Purpose Logics>HD74AC Series

Renesas

瑞萨

8-bit Shift Register

Description The HD74AC166/HD74ACT166 is an 8-bit, serial or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs a

文件：226.88 Kbytes 页数：9 Pages

RENESAS

瑞萨

8-bit Shift Register

Description The HD74AC166/HD74ACT166 is an 8-bit, serial or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs a

文件：226.88 Kbytes 页数：9 Pages

RENESAS

瑞萨

8-bit Shift Register

Description The HD74AC166/HD74ACT166 is an 8-bit, serial or parallel-in, serial-out shift register using edge triggered D-type flip-flops. Serial and parallel entry are synchronous, with state changes initiated by the rising edge of the clock. An asynchronous Master Reset overrides other inputs a

文件：226.88 Kbytes 页数：9 Pages

RENESAS

瑞萨