丝印：HCT4520M；Package：SOIC；High-Speed CMOS Logic Dual Synchronous Counters

Features • Positive or Negative Edge Triggering • Synchronous Internal Carry Propagation • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -5

文件：367.32 Kbytes 页数：16 Pages

TI

德州仪器

丝印：HCT4520M；Package：SOIC；High-Speed CMOS Logic Dual Synchronous Counters

Features • Positive or Negative Edge Triggering • Synchronous Internal Carry Propagation • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -5

文件：367.32 Kbytes 页数：16 Pages

TI

德州仪器

丝印：HCT4520M；Package：SOIC；High-Speed CMOS Logic Dual Synchronous Counters

Features • Positive or Negative Edge Triggering • Synchronous Internal Carry Propagation • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -5

文件：367.32 Kbytes 页数：16 Pages

TI

德州仪器

Dual binary counter

DESCRIPTION The HEF4520B is a dual 4-bit internally synchronous binary counter. The counter has an active HIGH clock input (CP0) and an active LOW clock input (CP1), buffered outputs from all four bit positions (O0to O3) and an active HIGH overriding asynchronous master reset input (MR). The cou

文件：64.81 Kbytes 页数：7 Pages

PHI

PHI

Dual binary counter

1. General description The HEF4520B is a dual 4-bit internally synchronous binary counter with two clock inputs (nCP0 and nCP1), buffered outputs from all four bit positions (nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on either the LOW-to-HIGH transition of n

文件：219.09 Kbytes 页数：12 Pages

NEXPERIA

安世