Dual 4-bit serial-in/parallel-out shift register

GENERAL DESCRIPTION The 74HC/HCT4015 are high-speed Si-gate CMOS devices and are pin compatible with the “4015” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. FEATURES • Output capability: standard • ICCcategory: MSI

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PHI

飞利浦

Dual 4-bit serial-in/parallel-out shift register

恩XP

恩智浦

Dual 4-bit static shift register

DESCRIPTION The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (D), a clock input (CP), four fully buffered parallel outputs (O0 to O3) and an overriding asynchronous master reset input (MR). Information pr

文件：58.08 Kbytes 页数：5 Pages

PHI

飞利浦

Dual 4-bit static shift register

1. General description The HEF4015B is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). Each shift register has a serial data input (nD), a clock input (nCP), four fully buffered parallel outputs (Q0 to Q3) and an overriding asynchronous master reset input (nMR)

文件：213.5 Kbytes 页数：11 Pages

NEXPERIA

安世