Triple 3-Input NAND Gate(High-Performance Silicon-Gate CMOS)

Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The SL74HCT10 is identical in pinout to the LS/ALS10. The SL74HCT10 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to C

文件：33.85 Kbytes 页数：4 Pages

SLS

Current Transformers & Sensors

文件：339.68 Kbytes 页数：2 Pages

PREMO

普莱默

Current Transformers & Sensors

文件：339.68 Kbytes 页数：2 Pages

PREMO

普莱默

Current Transformers & Sensors

文件：339.68 Kbytes 页数：2 Pages

PREMO

普莱默

Current Transformers & Sensors

文件：339.68 Kbytes 页数：2 Pages

PREMO

普莱默

Triple 3-Input NAND Gate(High-Performance Silicon-Gate CMOS)

SLS

丝印：HCT109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器

丝印：HCT109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器

丝印：HCT109M；Package：SOIC；Dual J-K Flip-Flop with Set and Reset Positive-Edge Trigger

Features • Asynchronous Set and Reset • Schmitt Trigger Clock Inputs • Typical fMAX = 54MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wi

文件：367.45 Kbytes 页数：16 Pages

TI

德州仪器

丝印：HCT10M；Package：SOIC；CDx4HCT10 Triple 3-Input NAND Gates

1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 μA at VOL, VOH • Buffered inputs • 4.5 V to 5.5 V operation • Wide operating temperature range: -55°C to +125°C • Supports fanout up to 10 LSTTL loads • Significant power r

文件：1.13946 Mbytes 页数：27 Pages

TI

德州仪器