COUNTERS/DIVIDERS

[ST-Microelectronics] DESCRIPTION The HCC4017B/4022B (extended temperature range) and HCF4017B/4022B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. 4017B DECADE COUNTER WITH 1

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ETCList of Unclassifed Manufacturers

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OCTAL COUNTER WITH 8 DECODED OUTPUTS

DESCRIPTION The HCC4017B/4022B (extended temperature range) and HCF4017B/4022B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. 4017B DECADE COUNTER WITH 10 DECODED OUTPUTS 4022B OCT

文件：233.82 Kbytes 页数：11 Pages

STMICROELECTRONICS

意法半导体

COUNTERS/DIVIDERS

DESCRIPTION The HCC4017B/4022B (extended temperature range) and HCF4017B/4022B (intermediate temperature range) are monolithic integrated circuits, available in 16-lead dual in-line plastic or ceramic package and plastic micro package. 4017B DECADE COUNTER WITH 10 DECODED OUTPUTS 4022B OCT

文件：281.05 Kbytes 页数：12 Pages

STMICROELECTRONICS

意法半导体

High Definition Oscilloscopes

Combining Teledyne LeCroy’s HD4096 high defnition 12-bit technology, with long memory, a compact form factor, 12.1” touch screen display and powerful debug tools, the HDO4000 is the ideal oscilloscope for precise measurements and quick debug. Tools such as WaveScan Search and Find, LabNotebook Rep

文件：3.17503 Mbytes 页数：16 Pages

TELEDYNE

华特力科

4-stage divide-by-8 Johnson counter

DESCRIPTION The HEF4022B is a 4-stage divide-by-8 Johnson counter with eight spike-free decoded active HIGH outputs (O0 to O7), an active LOW output from the most significant flip-flop (O4-7), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR

文件：91.7 Kbytes 页数：8 Pages

PHI

PHI

4-stage divide-by-8 Johnson counter

DESCRIPTION The HEF4022B is a 4-stage divide-by-8 Johnson counter with eight spike-free decoded active HIGH outputs (O0 to O7), an active LOW output from the most significant flip-flop (O4-7), active HIGH and active LOW clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR

文件：91.7 Kbytes 页数：8 Pages

PHI

PHI