HB54R5128KN-10B中文资料美光科技数据手册PDF规格书

描述 Description

The HB54R5128KN is Double Data Rate (DDR) SDRAM Module, mounted 256M bits DDR SDRAM (HM5425801BTB) sealed in TCP package, and 1 piece of serial EEPROM (2k bits EEPROM) for Presence Detect (PD). The HB54R5128KN is organized as 32M × 64 × 2 banks mounted 16 pieces of 256M bits DDR SDRAM.

特性 Features

• 200-pin socket type package (dual lead out)

- Outline: 67.6mm (Length) × 31.75mm (Height) × 3.80mm (Thickness)

- Lead pitch: 0.6mm

• 2.5V power supply (VCC)

• SSTL-2 interface for all inputs and outputs

• Clock frequency: 133 MHz (max) (-A75B/B75B) : 100 MHz (max) (-10B)

• Data inputs, outputs and DM are synchronized with DQS

• 4 banks can operate simultaneously and independently (Component)

• Burst read/write operation

• Programmable burst length: 2, 4, 8

- Burst read stop capability

• Programmable burst sequence

- Sequential

- Interleave

• Start addressing capability

- Even and Odd

• Programmable /CAS latency (CL): 2, 2.5

• 8192 refresh cycles: 7.8µs (8192row/64ms)

• 2 variations of refresh

- Auto refresh

- Self refresh