128Mb (2Mx4Banks×16) DDR SDRAM

The H2A21281643B is high speed Synchronous graphic RAM fabricated with ultra high performance CMOS process containing 134,217,728 bits which organized as 2Meg words x 4 banks by 16 bits.\nThe 128Mb DDR SDRAM uses a double data rate architecture to accomplish high-speed operation. The data path inter \n• 2.5V ± 0.2V Power Supply for DDR400/333 \n• Double Data Rate architecture; two data transfers per clock cycle \n• Differential clock inputs (CLK and /CLK ) \n• DQS is edge-aligned with data for Read; center-aligned with data for Write \n• CAS Latency: 2, 2.5 and 3 \n• Burst Length: 2, 4 and 8 \n;

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