Phase Control Thyristors, 100A

Features • Improved glass passivation for high reliability • Exceptional stability at high temperatures • High di/dt and dv/dt capabilities • Metric thread type available • Low thermal resistance

文件：116.96 Kbytes 页数：2 Pages

NAINA

PHASE CONTROL THYRISTOR

文件：89.36 Kbytes 页数：6 Pages

HIRECT

Phase Control Thyristors, 100A

NAINA(NSL)

SNx4AHC125 Quadruple Bus Buffer Gates With 3-State Outputs

1 Features • Operating Range: 2 V to 5.5 V • Latch-Up Performance Exceeds 250 mA Per JESD 17 • Four Individual Output Enable Pins 2 Applications • Flow Meters • Programmable Logic Controllers • Power Over Ethernet (PoE) • Motor Drives and Controls • Electronic Point-of-Sale 3 Descri

文件：2.83698 Mbytes 页数：42 Pages

TI

德州仪器

Quad buffer/line driver; 3-state

DESCRIPTION The 74AHC/AHCT125 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT125 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) a

文件：78.87 Kbytes 页数：16 Pages

PHI

PHI

QUAD BUS BUFFERS 3-STATE

DESCRIPTION The 74VHC125 is an advanced high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The device requires the 3-STATE control input G to be set high to place the output in to the high impedance state. Power down pr

文件：61.74 Kbytes 页数：8 Pages

STMICROELECTRONICS

意法半导体