10-Bit LVTTL/GTLP Transceiver with Split LVTTL Port and Feedback Path

General Description The GTLP10B320 is a 10-bit Universal bus driver and receiver, with separate LVTTL inputs and outputs and a feedback path for diagnostics, that provides LVTTL to GTLP signal level translation. High speed backplane operation is a direct result of GTLP’s reduced output swing ( F

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Fairchild

仙童半导体

10-Bit LVTTL/GTLP Transceiver with Split LVTTL Port and Feedback Path

General Description\nThe GTLP10B320 is a 10-bit Universal bus driver and receiver, with separate LVTTL inputs and outputs and a feedback path for diagnostics, that provides LVTTL to GTLP signal level translation. High speed backplane operation is a direct result of GTLP’s reduced output swing (<1V), ■ Bidirectional interface between GTLP and LVTTL logic levels\n■ Variable edge rate control pin to select desired edge rate on GTLP port (VERC)\n■ VREF pin provides external supply reference voltage for receiver threshold adjustibility\n■ Split LVTTL inputs and outputs\n■ Special PVT compensation ci;

ONSEMI

安森美半导体

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：管件 类别：集成电路（IC） 通用总线功能 描述：IC UNIV BUS DVR 10BIT 56TSSOP

ONSEMI

安森美半导体

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：管件 类别：集成电路（IC） 通用总线功能 描述：IC UNIV BUS DVR 10BIT 56TSSOP

ONSEMI

安森美半导体