GPTC6603A1数据手册Generalplus中文资料规格书

描述 Description

The GPTC6603A1, a newly invented micro-controller for caller ID and vocal dialer products, carries GENERALPLUS newest 16-bit μ'nSPTM CPU technology. The μ'nSPTM high processing speed assures that the GPTC6603A1 is able to facilitate the sophisticated digital signal processing. In addition to the advanced μ'nSPTM technology, other primary functions include RAM, ROM, IO, interrupt controller, two timer/counters, LCD controller/driver, 8-bit Analog-to-Digital Converter (ADC), Dual-Tone- Multi-Frequency (DTMF) generator, and melody Digital-to-Analog Converter (DAC) output. For power savings, a software controllable standby mode and adjustable CPU clock can be used to achieve the best power management.The GPTC6603A1 is able to drive LCD directly, and to perform complex function and arithmetic. An external 32768Hz crystal oscillator produces a steady time base for clock function. With the built-in DTMF generator, the telephone dialer function can be implemented. Plus, the flexible LCD controller and regulator make the LCD driver achieving the best display quality.The GPTC6603A1 can be widely used in telecom products such as multifunction telephone dialer with/without Caller Identification and general-purpose controller. The GPTC6603A1 provides not only the latest telecom technology, but also the full service and support of GENERALPLUS.

特性 Features

• GENERALPLUS 16-bit μ'nSPTM CPU
• SRAM 0.5K x 16 bits
• ROM 12K x 16 bits

• Clock
• An external 32768Hz crystal for dialing and demodulation
• An external resistor to drive RC-oscillator for CPU clock
• Programmable RC-oscillator frequency : 1MHz or 10MHz
• /1,/2,/4,/8 of selected RC-oscillator for CPU clock

• Operating voltage
• CPU operation voltage : 2.0V - 3.6V
• DTMF receiver / FSK decoder : 2.2V - 3.6V

• Operation Modes
• Operating mode, Standby mode, and Halt mode

• Timer/Counter
• One 16-bit timer/counter

• One 8-bit timer
• Power management for system reliability
• Low-Voltage-Reset function
• Power-On-Reset function
• Watchdog reset (derived from 32768Hz crystal)

• 10 Interrupt / Wakeup Sources (INT / WP)
• IOC[1:0] edge-triggered
• IOA[7:0] edge-triggered
• Timer A / Timer B overflow
• T32KHz,T2KHz,T128Hz,T8Hz (derived from 32768Hz)
• Line Signal Detector

• LCD Driver
• Typical 8 COM x 24 SEG
• SEG[23:20] shared with IOD[1:0], IOB5 and IOA5
• 1/4 bias, 1/8 duty

• 17 I/Os, up to 21 I/Os max.
• IOA[5:0]:programmable pull-high, wakeup / interrupt
• IOA[7:6]:programmable pull-high / pull-low, wakeup / interrupt
• IOB[5:0]:COMS output, IOB[7:6] NMOS open drain
• IOC[2:0]:COMS output, IOC0 shared with DAC2
• IOD[1:0] : CMOS I/O, shared with SEG[23:22]

• Analog Front End
• Op amp for the twisted pair telephone line
• 5-stage programmable PGA
• 8-bit A/D, with sample-rate up to 8KHz

• DTMF and FSK demodulation
• Object code of DTMF and FSK decoders provided
• Compatible with Bell 202, and ITU V.23 FSK specifications
• FSK/DTMF decoder auto-select function
• Built-in line signal detector

• Miscellaneous
• Built-in DTMF generator
• 2 DAC output pins for melody and speech
• Multiplication with cumulative addition for user's digital filters