High Performance E2CMOS PLD

文件：340.72 Kbytes 页数：23 Pages

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High Performance E2CMOS PLD Generic Array Logic?

文件：339.82 Kbytes 页数：23 Pages

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High Performance E2CMOS PLD Generic Array Logic?

文件：654.14 Kbytes 页数：24 Pages

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High Performance E2CMOS PLD Generic Array Logic?

文件：395.51 Kbytes 页数：22 Pages

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莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件：654.14 Kbytes 页数：24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD

文件：340.72 Kbytes 页数：23 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic?

文件：654.14 Kbytes 页数：24 Pages

Lattice

莱迪思

High Performance E2CMOS PLD Generic Array Logic™

Description\nThe GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times (<100ms) allow the devices to be reprogra •HIGH PERFORMANCE E2CMOS®TECHNOLOGY\n—3.5 ns Maximum Propagation Delay\n—Fmax = 250 MHz\n—3.0 ns Maximum from Clock Input to Data Output\n—UltraMOS® Advanced CMOS Technology\n•50% to 75% REDUCTION IN POWER FROM BIPOLAR\n—75mA Typ Icc on Low Power Device\n—45mA Typ Icc on Quarter Power Device;

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Package：20-LCC（J 形引线）；包装：管件 类别：集成电路（IC） CPLD（复杂可编程逻辑器件） 描述：IC CPLD 8MC 10NS 20PLCC

Lattice Semiconductor Corporation

Package：20-LCC（J 形引线）；包装：托盘 类别：集成电路（IC） CPLD（复杂可编程逻辑器件） 描述：IC CPLD 8MC 10NS 20PLCC

Lattice Semiconductor Corporation