High Performance E2CMOS PLD Generic Array Logic?

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High Performance E2CMOS PLD Generic Array Logic

Description The GAL16V8, at 3.5 ns maximum propagation delay time, combines a high performance CMOS process with Electrically Erasable (E2) floating gate technology to provide the highest speed performance available in the PLD market. High speed erase times ( Features •HIGH PERFORMANCE

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High Performance E2CMOS PLD Generic Array Logic?

文件：339.82 Kbytes 页数：23 Pages

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High Performance E2CMOS PLD Generic Array Logic?

文件：654.14 Kbytes 页数：24 Pages

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