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EPM7064AELI44-7N中文资料PDF规格书
EPM7064AELI44-7N规格书详情
General Description
MAX 7000A (including MAX 7000AE) devices are high-density, high-performance devices based on Altera’s second-generation MAX architecture.
Features...
■ High-performance 3.3-V EEPROM-based programmable logic
devices (PLDs) built on second-generation Multiple Array MatriX
(MAX®) architecture (see Table 1)
■ 3.3-V in-system programmability (ISP) through the built-in
IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface with
advanced pin-locking capability
– MAX 7000AE device in-system programmability (ISP) circuitry
compliant with IEEE Std. 1532
– EPM7128A and EPM7256A device ISP circuitry compatible with
IEEE Std. 1532
■ Built-in boundary-scan test (BST) circuitry compliant with
IEEE Std. 1149.1
■ Supports JEDEC Jam Standard Test and Programming Language
(STAPL) JESD-71
■ Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding
EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding
EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
■ Pin-compatible with the popular 5.0-V MAX 7000S devices
■ High-density PLDs ranging from 600 to 10,000 usable gates
■ Extended temperature range
■ 4.5-ns pin-to-pin logic delays with counter frequencies of up to
227.3 MHz
■ MultiVoltTM I/O interface enables device core to run at 3.3 V, while
I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels
■ Pin counts ranging from 44 to 256 in a variety of thin quad flat pack
(TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), space
saving FineLine BGATM, and plastic J-lead chip carrier (PLCC)
packages
■ Supports hot-socketing in MAX 7000AE devices
■ Programmable interconnect array (PIA) continuous routing structure
for fast, predictable performance
■ PCI-compatible
■ Bus-friendly architecture, including programmable slew-rate control
■ Open-drain output option
■ Programmable macrocell registers with individual clear, preset,
clock, and clock enable controls
■ Programmable power-up states for macrocell registers in
MAX 7000AE devices
■ Programmable power-saving mode for 50 or greater power
reduction in each macrocell
■ Configurable expander product-term distribution, allowing up to
32 product terms per macrocell
■ Programmable security bit for protection of proprietary designs
■ 6 to 10 pin- or logic-driven output enable signals
■ Two global clock signals with optional inversion
■ Enhanced interconnect resources for improved routability
■ Fast input setup times provided by a dedicated path from I/O pin to
macrocell registers
■ Programmable output slew-rate control
■ Programmable ground pins
产品属性
- 型号:
EPM7064AELI44-7N
- 功能描述:
CPLD - 复杂可编程逻辑器件 CPLD - MAX 7000 64 Macro 36 IOs
- RoHS:
否
- 制造商:
Lattice
- 存储类型:
EEPROM
- 大电池数量:
128
- 最大工作频率:
333 MHz
- 延迟时间:
2.7 ns
- 可编程输入/输出端数量:
64
- 工作电源电压:
3.3 V
- 最大工作温度:
+ 90 C
- 最小工作温度:
0 C
- 封装/箱体:
TQFP-100
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
ALTERA |
23+ |
PLCC-44 |
6011 |
全新原装现货特价/假一罚十 |
询价 | ||
ALTERA/阿尔特拉 |
21+ |
PLCC44 |
5000 |
全新原装现货 价格优势 |
询价 | ||
ALTERA |
22+ |
PLC |
7500 |
只做原装正品假一赔十!正规渠道订货! |
询价 | ||
ALTERA/阿尔特拉 |
21+ |
44PLCC |
7813 |
一站式BOM配单 |
询价 | ||
ALTERA |
22+ |
PLCC |
1450 |
强势库存!绝对原装公司现货! |
询价 | ||
ALTERA |
2022+ |
PLC |
4000 |
原装原厂代理 可免费送样品 |
询价 | ||
ALTERA |
20+ |
PLCC |
64 |
英卓尔科技,进口原装现货! |
询价 | ||
ALTERA |
2020+ |
PLC |
8000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
ALTERA/阿尔特拉 |
23+ |
PLCC44 |
6000 |
原装/报价当天为准 |
询价 | ||
alterA |
13+ |
PLCC44 |
2000 |
alterA系列全新原装正品,公司现货供应EPM7064AELI44-7N,绝对正品原装,欢迎咨询洽谈。 |
询价 |