High-Speed, High-Density MAX 5000 Devices

High-Speed, High-Density MAX 5000 Devices

文件：1.83026 Mbytes 页数：52 Pages

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High-Speed, High-Density MAX 5000 Devices

High-Speed, High-Density MAX 5000 Devices

文件：1.83026 Mbytes 页数：52 Pages

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阿尔特

High-Speed, High-Density MAX 5000 Devices

High-Speed, High-Density MAX 5000 Devices

文件：1.83026 Mbytes 页数：52 Pages

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Programmable Logic Device Family

General Description The MAX 5000 family combines innovative architecture and advanced process technologies to offer optimum performance, flexibility, and the highest logic-to-pin ratio of any general-purpose programmable logic device (PLD) family. The MAX 5000 family provides 600 to 3,750 usabl

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High-Speed, High-Density MAX 5000 Devices

High-Speed, High-Density MAX 5000 Devices

文件：1.83026 Mbytes 页数：52 Pages

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High-Speed, High-Density MAX 5000 Devices

High-Speed, High-Density MAX 5000 Devices

文件：1.83026 Mbytes 页数：52 Pages

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High-Speed, High-Density MAX 5000 Devices

High-Speed, High-Density MAX 5000 Devices

文件：1.83026 Mbytes 页数：52 Pages

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JTAG & In-System Programmability

Introduction The MAX®II family of instant-on, non-volatile CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast perform

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MAX II Device Handbook

Features The MAX II CPLD has the following features: ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 25 μA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array block

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Section I. MAX II Device Family

Features The MAX II CPLD has the following features: ■ Low-cost, low-power CPLD ■ Instant-on, non-volatile architecture ■ Standby current as low as 25 μA ■ Provides fast propagation delay and clock-to-output times ■ Provides four global clocks with two clocks available per logic array bloc

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