EPF6016A中文资料Programmable Logic数据手册Intel规格书

描述 Description

■Provides an ideal low-cost, programmable alternative to high-volume gate array applications and allows fast design changes during prototyping or design testing
■Product features
- Register-rich, look-up table-(LUT-) based architecture
- OptiFLEX\"architecture that increases device area efficiency
- Typical gates ranging from 5,000 to 24,000 gates(see Table 1)
- Built-in low-skew clock distribution tree
- 100% functional testing of all devices; test vectors or scan chains are not required
■System-level features
- In-circuit reconfigurability (ICR) via external configuration device or intelligent controller
- 5.0-V devices are fully compliant with peripheral component interconnect Special Interest Group(PCI SIG) PCI Local Bus Specification, Reoision 2.2
- Built-in Joint Test Action Group (JTAG) boundary-scan test(BST) circuitry compliant with IEEE Std.1149.1-1990, available without consuming additional device logic MultiVoltM 1/O interface operation, allowing a device to bridge between systems operating at different voltages
- Low power consumption (typical specification less than 0.5mA in standby mode)
- 3.3-Vdevices support hot-socketing

简介

EPF6016A属于集成电路（IC）的FPGA（现场可编程门阵列）。由制造生产的EPF6016AFPGA（现场可编程门阵列）FPGA 是用于执行逻辑运算和信息处理的用户可配置集成电路产品，通常具有非常高级别的集成功能。这些器件通常用于代替通用微处理器，其中已知运算将以极高的速度执行，例如用于接收和处理来自高速数据转换器的信息。它们通常需要外部存储设备来存储用户所需的配置，并在启动时重新加载这些配置。