EP1C12T400C8ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400C8ES

Section I. Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400I6ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400I6ES

Section I. Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400I7ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400I7ES

Section I. Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400I8ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C12T400I8ES

Section I. Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C123M080DZSSTHM

Wet Tantalum Capacitors, High Energy, Ultra High Capacitance, -55 °C to +125 °C Operation; High energy, very high capacitance design\nAll tantalum, hermetically sealed case\nUtilizes Vishay proven SuperTan® technology;

EP1C12F100C6

Cyclone FPGA Family