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DSP56300FM中文资料飞思卡尔数据手册PDF规格书
DSP56300FM规格书详情
Overview
Freescale Semiconductor, Inc. designed the DSP56362 to support digital audio applications requiring digital audio compression and decompression, sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56362 usesthe high performance,
single-clock-per-cycle DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined with the audio signal processing capability of the Freescale Symphony™ DSP family, as shown in Figure 1-1. This design provides a two-fold performance increase over Freescale’s popular Symphony family of DSPs while retaining code compatibility. Significant
architectural enhancements include a barrel shifter, 24-bit addressing, instruction cache, and direct memory access (DMA). The DSP56362 offers 100 million instructions per second (MIPS) using an internal 100 MHz clock at 3.3 V.
Features
• Multimode, multichannel decoder software functionality
— Dolby Digital and Pro Logic
— MPEG2 5.1
—DTS
— Bass management
• Digital audio post-processing capabilities
— 3D Virtual surround sound
— Lucasfilm THX5.1
— Soundfield processing
— Equalization
• Digital Signal Processing Core
— 100 MIPS with a 100 MHz clock at 3.3 V +/- 5
— Object code compatible with the DSP56000 core
— Highly parallel instruction set
— Data arithmetic logic unit (ALU)
– Fully pipelined 24 x 24-bit parallel multiplier-accumulator (MAC)
– 56-bit parallel barrel shifter (fast shift and normalization;bit stream generation and parsing)
– Conditional ALU instructions
– 24-bit or 16-bit arithmetic support under software control
— Program control unit (PCU)
– Position independent code (PIC) support
– Addressing modes optimized for DSP applications (including immediate offsets)
– On-chip instruction cache controller
– On-chip memory-expandable hardware stack
– Nested hardware DO loops
– Fast auto-return interrupts
— Direct memory access (DMA)
– Six DMA channels supporting internal and external accesses
– One-, two-, and three- dimensional transfers (including circular buffering)
– End-of-block-transfer interrupts
– Triggering from interrupt lines and all peripherals
— Phase-locked loop (PLL)
– Software programmable PLL-based frequency synthesizer for the core clock
– Allows change of low-power divide factor (DF) without loss of lock
– Output clock with skew elimination
— Hardware debugging support
– On-Chip Emulation (OnCE‘) module
– Joint Action Test Group (JTAG) test access port (TAP)
– Address trace mode reflects internal program RAM accesses at the external port
产品属性
- 型号:
DSP56300FM
- 制造商:
FREESCALE
- 制造商全称:
Freescale Semiconductor, Inc
- 功能描述:
24-Bit Digital Signal Processor
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
FREESCA |
2020+ |
QFP208 |
80000 |
只做自己库存,全新原装进口正品假一赔百,可开13%增 |
询价 | ||
Freescale(飞思卡尔) |
23+ |
NA/ |
8735 |
原厂直销,现货供应,账期支持! |
询价 | ||
FREESCAL |
11+ |
QFP208 |
1005 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
询价 | ||
NXP |
23+ |
208LQFP |
4568 |
原厂原装正品现货,代理渠道,支持订货!!! |
询价 | ||
FREESCAL |
23+ |
QFP208 |
12800 |
##公司主营品牌长期供应100%原装现货可含税提供技术 |
询价 | ||
FREESCAL |
21+ |
QFP208 |
4105 |
原装现货假一赔十 |
询价 | ||
NXPUSAInc. |
23+ |
208-TQFP(28x28) |
66800 |
全新更新库存原厂原装现货 |
询价 | ||
FREESCALE |
LQFP208 |
2809 |
正品原装--自家现货-实单可谈 |
询价 | |||
MOT |
16+ |
QFN |
4000 |
进口原装现货/价格优势! |
询价 | ||
FREE |
1128+ |
QFP208 |
11564 |
只做原厂原装,认准宝芯创配单专家 |
询价 |