DS_K7N323601M中文资料三星数据手册PDF规格书

GENERAL DESCRIPTION

The K7N323601M and K7N321801M are 37,748,736-bits Synchronous Static SRAMs.

The NtRAMTM, or No Turnaround Random Access Memory utilizes all the bandwidth in any combination of operating cycles.

Address, data inputs, and all control signals except output enable and linear burst order are synchronized to input clock.

FEATURES

• 3.3V+0.165V/-0.165V Power Supply.

• I/O Supply Voltage 3.3V+0.165V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.

• Byte Writable Function.

• Enable clock and suspend operation.

• Single READ/WRITE control pin.

• Self-Timed Write Cycle.

• Three Chip Enable for simple depth expansion with no data-contention .

• A interleaved burst or a linear burst mode.

• Asynchronous output enable control.

• Power Down mode.

• 100-TQFP-1420A .

• 165FBGA(11x15 ball aray) with body size of 15mmx17mm.