DS90UB988-Q1中文资料德州仪器数据手册PDF规格书

1 Features

• OpenLDI (OLDI) transmitter

– 2 Port OLDI output (Dual Pixel Link) up to

420MHz OLDI clock

– Each Port supports 8MHz to 210MHz OLDI

clock

– Configurable 18-bit, 24-bit, 30-bit RGB

– Stream synchronization and splitting

• FPD-Link IV interface

– Up to 13.5/12.528/10.8/6.75/3.375Gbps per

channel; Up to 27Gbps over dual channels

– Coax/STP interconnect support

– Selectable 1, 2 channels

– Daisy-chain and splitting

– Adaptive equalization

• Optional digital RGB parallel output interface

supports 8MHz to 125MHz PCLK

• Ultra-low latency control channel

– Two fast-mode plus I2C up to 1MHz (up to

3.4MHz for local bus access)

– High-speed GPIOs

– Supports SPI and UART pass-through GPIOs

• Backwards compatibility

– 720p 92x and 1080p/2K 94x FPD-Link III

product families

• Security and diagnostics

– Link diagnostics

– Voltage and temperature monitoring

– BIST and pattern generation

– CRC and error diagnostics

– ECC on control bits

– Unique ID for counterfeit protection

• Advanced link robustness and EMC control

– Spread Spectrum Clocking Generation (SSCG)

– Adaptive Receiver Equalization (AEQ)

• Low power operation

– 1.8V and 1.15V dual power supply

• AEC-Q100 qualified for automotive applications

– AEC-Q Grade-Level 2 , –40°C to 105°C

– ISO 10605 and IEC 61000-4-2 ESD compliant

2 Applications

• Automotive Displays:

– Central Information Displays (CID)

– Rear Seat Entertainment (RSE)

– Digital instrument clusters

– Head units and HMI modules

– Head Up Display (HUD)

– Rear view and side mirror displays

3 Description

The DS90UB988-Q1 is an FPD-Link IV to OpenLDI

bridge device. In conjunction with an FPD-Link IV

serializer, the chipset receives a high-speed serialized

interface over low-cost 50Ω coax or STP/STQ cables.

The DS90UB988-Q1 supports OpenLDI (10 LVDS

data lanes + 2 clocks) interface with video up to

420MHz PCLK. This provides a bridge between

sources such as GPUs to connect to existing LVDS

based displays or application processors.

The FPD-Link IV interface supports video and audio

data transmission and full duplex control, including

I2C, and GPIO data over the same link. Consolidation

of video and control data over FPD-Link IV lanes

reduces the interconnect size and weight and

simplifies system design. EMI is minimized by the use

of low voltage differential signaling, data scrambling,

and randomization. In backward compatible FPD-Link

III mode, the device supports up to 2K resolutions with

24-bit color depth over a single/dual link .