DS80EP100数据手册开发板套件编程器的评估演示板及套件规格书PDF

描述 Description

TI’s Power-saver equalizer compensates for transmission medium losses and minimizes medium-induced deterministic jitter. Performance is guaranteed over the full range of 5 to 12.5 Gbps. The DS80EP100 requires no power to operate. The equalizer operates anywhere in the data path to minimize media-induced deterministic jitter in both FR4 traces and cable applications. Symmetric I/O structures support full duplex or half duplex applications. Linear compensation is provided independent of line coding or protocol. The device is ideal for both bi-level and multi-level signaling. The equalizer is available in a 6 pin leadless WSON package with a space saving 2.2 mm X 2.5 mm footprint. This tiny package provides maximum flexibility in placement and routing of the Power-saver equalizer.

特性 Features

• 5 to 12.5 Gbps Operation
• No Power or Ground Required
• Equalization Effective Anywhere in Data Path
• Equalizes CML, LV-PECL, LVDS Signals
• Symmetric I/O Structures Provide Equal Boost for Bi-directional Operation
• 7 dB Maximum Boost
• Code Independent, 8b/10b or Scrambled
• Supports Both Bi-level and Multi-level Signaling
• Extends Reach Over Backplanes and Cables
• Compatible with PCI-Express Gen1 and Gen2
• Compatible with XAUI
• Will Operate in Series with Existing Active Equalizer
• Easy to Handle 6 Pin WSON