丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

丝印：DS26C32AMJ；Package：CDIP；DS26C32AMQML Quad Differential Line Receiver

FEATURES • CMOS Design for Low Power • ±0.2V Sensitivity Over Input Common Mode Voltage Range • Input Fail-Safe Circuitry • Inputs Won't Load Line When VCC = 0V • Meets the Requirements of EIA Standard RS- 422 pull• TRI-STATE Outputs for Connection to System Buses DESCRIPTION The DS26

文件：764.35 Kbytes 页数：20 Pages

TI

德州仪器

Quad Differential Line Receiver

文件：311.3 Kbytes 页数：11 Pages

NSCNational Semiconductor (TI)

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