3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

文件：404.86 Kbytes 页数：14 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis

文件：406.47 Kbytes 页数：14 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

3.125 Gbps LVDS Buffer with Transmit Pre-Emphasis and Receive Equalization

文件：449.03 Kbytes 页数：14 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

3.125 Gbps LVDS Buffer with Receive Equalization

文件：434.57 Kbytes 页数：16 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

丝印：2R110；Package：WSON；DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Receive Equalization Reduce ISI Jitter • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space • 7 kV ESD on LVD

文件：542.31 Kbytes 页数：20 Pages

TI

德州仪器

丝印：2R110；Package：WSON；DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Receive Equalization Reduce ISI Jitter • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space • 7 kV ESD on LVD

文件：542.31 Kbytes 页数：20 Pages

TI

德州仪器

丝印：2R110；Package：WSON；DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Receive Equalization Reduce ISI Jitter • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space • 7 kV ESD on LVD

文件：542.31 Kbytes 页数：20 Pages

TI

德州仪器

丝印：2R110；Package：WSON；DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Receive Equalization Reduce ISI Jitter • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space • 7 kV ESD on LVD

文件：542.31 Kbytes 页数：20 Pages

TI

德州仪器

丝印：2R110；Package：WSON；DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Receive Equalization Reduce ISI Jitter • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space • 7 kV ESD on LVD

文件：542.31 Kbytes 页数：20 Pages

TI

德州仪器

丝印：2R110；Package：WSON；DS25BR110 3.125 Gbps LVDS Buffer with Receive Equalization

1FEATURES 2• DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation • Four Levels of Receive Equalization Reduce ISI Jitter • On-Chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count, and Minimizes Board Space • 7 kV ESD on LVD

文件：542.31 Kbytes 页数：20 Pages

TI

德州仪器