DS1495中文资料RAMified Real Time Clock数据手册ADI规格书

描述 Description

FEATURES
• Ideal for EISA bus PCs
• Functionally compatible with MC146818 in 32 KHz mode
• Totally nonvolatile with over 10 years of operation in the absence of power
• Self-contained subsystem includes lithium, quartz, and support circuitry
• Counts seconds, minutes, hours, day of the week, date, month, and year with leap year compensation
• Binary or BCD representations of time, calendar, and alarm
• 12- or 24-hour clock with AM and PM in 12-hour mode
• Daylight Savings Time option
• Interfaced with software as 64 register/RAM locations plus 8K x 8 of static RAM
   – 14 bytes of clock and control registers
   – 50 bytes of general and control registers
   – Separate 8K x 8 nonvolatile SRAM
• Programmable square wave output signal
• Bus-compatible interrupt signals (IRQ)
• Three interrupts are separately software-maskable and testable:
   – Time-of-day alarm once/second to once/day
   – Periodic rates from 122 µs to 500 ms
   – End-of-clock update cycle
• 28-pin JEDEC footprint
• Available as chip (DS1495/DS1495S) or stand alone module with embedded lithium battery and crystal (DS1497)

特性 Features

• Ideal for EISA bus PCs
• Functionally compatible with MC146818 in 32 KHz mode
• Totally nonvolatile with over 10 years of operation in the absence of power
• Self-contained subsystem includes lithium, quartz, and support circuitry
• Counts seconds, minutes, hours, day of the week, date, month, and year with leap year compensation
• Binary or BCD representations of time, calendar, and alarm
• 12- or 24-hour clock with AM and PM in 12-hour mode
• Daylight Savings Time option
• Interfaced with software as 64 register/RAM locations plus 8K x 8 of static RAM
   – 14 bytes of clock and control registers
   – 50 bytes of general and control registers
   – Separate 8K x 8 nonvolatile SRAM
• Programmable square wave output signal
• Bus-compatible interrupt signals (IRQ)
• Three interrupts are separately software-maskable and testable:
   – Time-of-day alarm once/second to once/day
   – Periodic rates from 122 µs to 500 ms
   – End-of-clock update cycle
• 28-pin JEDEC footprint
• Available as chip (DS1495/DS1495S) or stand alone module with embedded lithium battery and crystal (DS1497)