DRV8300UDPW集成电路（IC）的栅极驱动器规格书PDF中文资料

1 Features

• 100-V Three Phase Half-Bridge Gate driver

– Drives N-Channel MOSFETs (NMOS)

– Gate Driver Supply (GVDD): 5-20 V

– MOSFET supply (SHx) support upto 100 V

• Integrated Bootstrap Diodes (DRV8300UD

devices)

• Supports Inverting and Non-Inverting INLx inputs

• Bootstrap gate drive architecture

– 750-mA source current

– 1.5-A sink current

• Supports up to 15S battery powered applications

• Higher BSTUV (8V typ) and GVDDUV (7.6V typ)

threshold to support standard MOSFETs

• Low leakage current on SHx pins (<55 μA)

• Absolute maximum BSTx voltage upto 125-V

• Supports negative transients upto -22-V on SHx

• Built-in cross conduction prevention

• Adjustable deadtime through DT pin for QFN

package variants

• Fixed deadtime insertion of 200 nS for TSSOP

package variants

• Supports 3.3-V and 5-V logic inputs with 20 V Abs

max

• 4 nS typical propogation delay matching

• Compact QFN and TSSOP packages

• Efficient system design with Power Blocks

• Integrated protection features

– BST undervoltage lockout (BSTUV)

– GVDD undervoltage (GVDDUV)

2 Applications

• E-Bikes, E-Scooters, and E-Mobility

• Fans, Pumps, and Servo Drives

• Brushless-DC (BLDC) Motor Modules and PMSM

• Cordless Garden and Power Tools, Lawnmowers

• Cordless Vacuum Cleaners

• Drones, Robotics, and RC Toys

• Industrial and Logistics Robots

3 Description

DRV8300U is 100-V three half-bridge gate drivers,

capable of driving high-side and low-side N-channel

power MOSFETs. The DRV8300UD generates the

correct gate drive voltages using an integrated

bootstrap diode and external capacitor for the highside

MOSFETs. GVDD is used to generate gate drive

voltage for the low-side MOSFETs. The Gate Drive

architecture supports peak up to 750-mA source and

1.5-A sink currents.

The phase pins SHx is able to tolerate the significant

negative voltage transients; while high side gate

driver supply BSTx and GHx is able to support

to higher positive voltage transients (125-V) abs

max voltage which improves robustness of the

system. Small propagation delay and delay matching

specifications minimize the dead-time requirement

which further improves efficiency. Undervoltage

protection is provided for both low and high side

through GVDD and BST undervoltage lockout.