DRV8106-Q1数据手册TI中文资料规格书

描述 Description

The DRV8106-Q1 is a highly integrated half-bridge gate driver, capable of driving high-side and low-side N-channel power MOSFETs. It generates the proper gate drive voltages using an integrated doubler charge pump for the high-side and a linear regulator for the low-side.

The device uses a smart gate drive architecture to reduce system cost and improve reliability. The gate driver optimizes dead time to avoid shoot-through conditions, provides control to decreasing electromagnetic interference (EMI) through adjustable gate drive current, and protects against drain to source and gate short conditions with VDS and VGS monitors.

A wide common mode shunt amplifier provides inline current sensing to continuously measure motor current even during recirculating windows. The amplifier can be used in low-side or high-side sense configurations if inline sensing is not required.

The DRV8106-Q1 provide an array of protection features to ensure robust system operation. These include under and overvoltage monitors for the power supply and charge pump, VDS overcurrent and VGS gate fault monitors for the external MOSFETs, offline open load and short circuit diagnostics, and internal thermal warning and shutdown protection.

特性 Features

• AEC-Q100 qualified for automotive applications:
• Temperature grade 1: –40°C to +125°C, TA

• Half-bridge smart gate driver
• 4.9-V to 37-V (40-V abs. max) operating range
• Doubler charge pump for 100% PWM

• Pin to pin gate driver variants
• DRV8705-Q1: H-bridge with low-side amplifier
• DRV8706-Q1: H-bridge with inline amplifier

• Smart gate drive architecture
• Adjustable slew rate control
• 0.5-mA to 62-mA peak source current output
• 0.5-mA to 62-mA peak sink current output
• Integrated dead-time handshaking

• Wide common mode current shunt amplifier
• Supports inline, high-side, or low-side
• Adjustable gain settings (10, 20, 40, 80 V/V)
• Integrated feedback resistors
• Adjustable PWM blanking scheme

• Multiple interface options available
• SPI: Detailed configuration and diagnostics
• H/W: Simplified control and less MCU pins

• Spread spectrum clocking for EMI reduction
• Compact VQFN package with wettable flanks
• Integrated protection features
• Dedicated driver disable pin (DRVOFF)
• Supply and regulator voltage monitors
• MOSFET VDS overcurrent monitors
• MOSFET VGS gate fault monitors
• Charge pump for reverse polarity MOSFET
• Offline open load and short circuit diagnostics
• Device thermal warning and shutdown
• Fault condition interrupt pin (nFAULT)