Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs

General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly relate

文件：67.29 Kbytes 页数：6 Pages

Fairchild

仙童半导体

4-Bit Magnitude Comparators

文件：155.95 Kbytes 页数：8 Pages

NSC

国半

4-Bit Magnitude Comparator

General Description These 4-bit magnitude comparators perform comparison of straight binary or BCD codes. Three fully-decoded decisions about two, 4-bit words (A, B) are made and are externally available at three outputs. These devices are fully expandable to any number of bits without external g

文件：58.87 Kbytes 页数：6 Pages

Fairchild

仙童半导体

4-Bit Magnitude Comparators

文件：155.95 Kbytes 页数：8 Pages

NSC

国半