74系列逻辑芯片

TI

德州仪器

Dual D-Type Positive Edge-Triggered Flip-Flop

Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir

文件：61.42 Kbytes 页数：10 Pages

HitachiHitachi Semiconductor

日立日立公司

Dual D-Type Positive Edge-Triggered Flip-Flop

Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir

文件：121.33 Kbytes 页数：8 Pages

RENESAS

瑞萨

Dual D-Type Positive Edge-Triggered Flip-Flop

Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not dir

文件：121.33 Kbytes 页数：8 Pages

RENESAS

瑞萨