FPGA IP Cores

Description: DFPIC1655X High Performance Configurable 8-bit RISC Microcontroller The DFPIC1655X is a low-cost, high performance, 8-bit, fully static soft IP Core, dedicated for operation with fast memory (typically on-chip). The core has been designed with a special concern about low power con-sumpt

Microchip

微芯科技

High Performance Configurable 8-bit RISC Microcontroller

文件：187.11 Kbytes 页数：7 Pages

DCD

Digital Core Design

3A DDR Bus Termination Regulator

Description The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 i

文件：513.539 Kbytes 页数：9 Pages

FAIRCHILD

仙童半导体

3A DDR Bus Termination Regulator

Description The FAN1655 is a low-cost bi-directional LDO specifically designed for terminating DDR memory bus. It can both sink and source up to 2.1A continuous, 3A peak, providing enough current for most DDR applications. Load regulation meets the JEDEC spec, VTT = VREFOUT ± 40mV. The FAN1655 i

文件：513.539 Kbytes 页数：9 Pages

FAIRCHILD

仙童半导体

Integrated Circuit TV Stereo Decoder

Description: The NTE1655 is a TV stereo decoder integrated circuit in a 16–Lead DIP type package designed for television stereo. An L–R output is provided to drive further audio processing. Features: • Low Impedance L + R and L – R Outputs • Mono/Stereo Switching and Indication •

文件：22.91 Kbytes 页数：2 Pages

NTE