丝印：D31；Package：VSSOP；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：VSSOP；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：VSSOP；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：VSSOP；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：VSSOP；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：VSSOP；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：SON；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：SON；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：SON；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器

丝印：D31；Package：SON；Low-Power, Rail-to-Rail Output, 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER

FEATURES microPower OPERATION: 250μA at 5V POWER-ON RESET TO ZERO POWER SUPPLY: +2.7V to +5.5V ENSURED MONOTONIC BY DESIGN SETTLING TIME: 10μs to ±0.003 FSR LOW-POWER SERIAL INTERFACE WITH SCHMITT-TRIGGERED INPUTS ON-CHIP OUTPUT BUFFER AMPLIFIER, RAIL-TO-RAIL OPERATION SYNC INTERRUPT FAC

文件：967.26 Kbytes 页数：29 Pages

TI

德州仪器