首页>CYP15G0402DX-BGC>规格书详情
CYP15G0402DX-BGC中文资料赛普拉斯数据手册PDF规格书
相关芯片规格书
更多- CYP15G0401DXB
- CYP15G0401DXB-BGC
- CYP15G0401DXB-BGI
- CYP15G0402DX
- CYP15G0401RB-BGC
- CYP15G0401RB-BGXI
- CYP15G0402DXB-BGC
- CYP15G0401RB-BGXC
- CYP15G0401DXB-BGXC
- CYP15G0401DXB-BGI
- CYP15G0402DXB-BGXI
- CYP15G0401DXB
- CYP15G0401TB-BGC
- CYP15G0402DXB
- CYP15G0401TB-BGXI
- CYP15G0402DXB-BGXC
- CYP15G0401RB
- CYP15G0401RB-BGI
CYP15G0402DX-BGC规格书详情
Functional Description
The CYP15G0402DX Quad HOTLinkII™ SERDES is a point-to-point communications building block allowing the transfer of pre-encoded data over high-speed serial links (optical fiber, balanced, and unbalanced copper transmission lines) at speeds ranging from 200 to 1500 MBaud per serial link.
Each transmit channel accepts pre-encoded 10-bit transmission characters in an input register, serializes each character, and drives it out a PECL-compatible differential line driver. Each receive channel accepts a serial data stream at a differential line receiver, deserializes the stream into 10-bit characters, frames these characters to the proper 10-bit character boundaries, and this data becomes register outputs with a recovered character clock. Figure 1 illustrates typical connections between independent systems and a CYP15G0402DX.
As a second-generation HOTLink device, the CYP15G0402DX extends the HOTLink family to faster data rates, while maintaining serial link compatibility with other HOTLink devices.
Features
• Second generation HOTLink® technology
• Fibre-Channel and Gigabit-Ethernet-compliant
• 10-bit unencoded data transport
— Aggregate throughput of 12 GB/s
• Selectable parity check/generate
• Four independently controlled 10-bit channels
• Selectable input clocking options
• User selectable framing character
— +Comma, ±comma, or full K28.5 detect
— Single or multicharacter framer for character alignment
— Low-latency option
• Synchronous parallel input interface
— User-configurable threshold level
— Compatible with LVTTL, LVCMOS, LVTTL
• Synchronous parallel output interface
— Compatible with LVTTL, LVCMOS, LVTTL
• 200-to-1500 MBaud serial signaling rate
• Internal PLLs with no external PLL components
— Separate clock and data-recovery PLL per channel
— Common transmit clock multiplier PLL
• Differential PECL-compatible serial inputs
• Differential PECL-compatible serial outputs
— Source matched for 50Ω transmission lines
— No external resistors required
— Adjustable amplitude for 100Ω or 150Ω balanced loads
• Compatible with fiber-optic modules and copper cables
• JTAG boundary scan
• Built-in self-test (BIST) for at-speed link testing
• Per-channel Link Quality Indicator
— Analog signal detect
— Digital signal detect
• Low-power 3W typical
• 256-ball BGA
• 0.25µ BiCMOS technology
产品属性
- 型号:
CYP15G0402DX-BGC
- 制造商:
CYPRESS
- 制造商全称:
Cypress Semiconductor
- 功能描述:
Quad HOTLinkII SERDES
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
CYPRESS |
21+ |
BGA |
5 |
原装现货假一赔十 |
询价 | ||
CYP |
2339+ |
N/A |
5650 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
询价 | ||
Cypress |
23+ |
256BGA |
9000 |
原装正品,支持实单 |
询价 | ||
CYPRESS/赛普拉斯 |
23+ |
BGA |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
询价 | ||
CYPRESS |
2016+ |
BGA |
3526 |
假一罚十进口原装现货原盘原标! |
询价 | ||
CYPRESS |
21+ |
BGA |
4310 |
全新原装亏本出 |
询价 | ||
Cypress |
23+ |
SOP/QFP |
3200 |
全新原装、诚信经营、公司现货销售! |
询价 | ||
CYPRESS(赛普拉斯) |
23+ |
BGAE256EP |
7350 |
现货供应,当天可交货!免费送样,原厂技术支持!!! |
询价 | ||
CYPRESS |
0907+ |
BGA |
315 |
询价 | |||
CYPRESS |
2138+ |
原厂标准封装 |
8960 |
代理CYPRESS全系列芯片,原装现货 |
询价 |