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CY7C1512KV18-333BZC中文资料赛普拉斯数据手册PDF规格书
厂商型号 |
CY7C1512KV18-333BZC |
参数属性 | CY7C1512KV18-333BZC 封装/外壳为165-LBGA;包装为卷带(TR);类别为集成电路(IC) > 存储器;产品描述:IC SRAM 72MBIT PARALLEL 165FBGA |
功能描述 | 72-Mbit QDR-II SRAM 2-Word Burst Architecture |
文件大小 |
814.94 Kbytes |
页面数量 |
30 页 |
生产厂商 | CypressSemiconductor |
企业简称 |
Cypress【赛普拉斯】 |
中文名称 | 赛普拉斯半导体公司官网 |
原厂标识 | |
数据手册 | |
更新时间 | 2024-9-20 14:49:00 |
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CY7C1512KV18-333BZC规格书详情
Functional Description
The CY7C1510KV18, CY7C1525KV18, CY7C1512KV18, and CY7C1514KV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to support read operations and the write port has dedicated data inputs to support write operations. QDR-II architecture has separate data inputs and data outputs to completely eliminate the need to “turnaround” the data bus that exists with common I/O devices.
Features
■ Separate Independent Read and Write Data Ports
❐ Supports concurrent transactions
■ 333 MHz Clock for High Bandwidth
■ 2-word Burst on all Accesses
■ Double Data Rate (DDR) Interfaces on both Read and Write Ports (data transferred at 666 MHz) at 333 MHz
■ Two Input Clocks (K and K) for precise DDR timing
❐ SRAM uses rising edges only
■ Two Input Clocks for Output Data (C and C) to minimize Clock Skew and Flight Time mismatches
■ Echo Clocks (CQ and CQ) simplify Data Capture in High Speed Systems
■ Single Multiplexed Address Input bus latches Address Inputs for both Read and Write Ports
■ Separate Port Selects for Depth Expansion
■ Synchronous internally Self-timed Writes
■ QDR™-II operates with 1.5 Cycle Read Latency when DOFF is asserted HIGH
■ Operates similar to QDR-I Device with 1 Cycle Read Latency when DOFF is asserted LOW
■ Available in x8, x9, x18, and x36 Configurations
■ Full Data Coherency, providing Most Current Data
■ Core VDD = 1.8V (±0.1V); IO VDDQ = 1.4V to VDD
❐ Supports both 1.5V and 1.8V IO supply
■ Available in 165-ball FBGA Package (13 x 15 x 1.4 mm)
■ Offered in both Pb-free and non Pb-free Packages
■ Variable Drive HSTL Output Buffers
■ JTAG 1149.1 Compatible Test Access Port
■ Phase Locked Loop (PLL) for Accurate Data Placement
产品属性
- 产品编号:
CY7C1512KV18-333BZC
- 制造商:
Cypress Semiconductor Corp
- 类别:
集成电路(IC) > 存储器
- 包装:
卷带(TR)
- 存储器类型:
易失
- 存储器格式:
SRAM
- 技术:
SRAM - 同步,QDR II
- 存储容量:
72Mb(4M x 18)
- 存储器接口:
并联
- 电压 - 供电:
1.7V ~ 1.9V
- 工作温度:
0°C ~ 70°C(TA)
- 安装类型:
表面贴装型
- 封装/外壳:
165-LBGA
- 供应商器件封装:
165-FBGA(13x15)
- 描述:
IC SRAM 72MBIT PARALLEL 165FBGA
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
Cypress |
21+ |
165FBGA (13x15) |
13880 |
公司只售原装,支持实单 |
询价 | ||
Cypress(赛普拉斯) |
23+ |
NA |
20094 |
正纳10年以上分销经验原装进口正品做服务做口碑有支持 |
询价 | ||
CYPRESS |
23+ |
BGA |
44262 |
公司原装现货!主营品牌!可含税欢迎查询 |
询价 | ||
Cypress Semiconductor Corp |
21+ |
165-FBGA(13x15) |
56200 |
一级代理/放心采购 |
询价 | ||
CYPRESS/赛普拉斯 |
2022 |
NA |
80000 |
原装现货,OEM渠道,欢迎咨询 |
询价 | ||
CYPRESS/赛普拉斯 |
23+ |
BGA |
3000 |
一级代理原厂VIP渠道,专注军工、汽车、医疗、工业、 |
询价 | ||
CYPRESS/赛普拉斯 |
21+ |
BGA |
1709 |
询价 | |||
Cypress |
21+ |
25000 |
原厂原包 深圳现货 主打品牌 假一赔百 可开票! |
询价 | |||
CYPRESS/赛普拉斯 |
22+ |
NA |
20000 |
原装现货,实单支持 |
询价 | ||
Cypress Semiconductor Corp |
23+/24+ |
165-LBGA |
8600 |
只供原装进口公司现货+可订货 |
询价 |