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CY7C1339F

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-100AC

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-100AI

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-100BGC

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-100BGI

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-133AC

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-133AI

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-133BGC

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-133BGI

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1339F-166AC

4-Mbit (128K x 32) Pipelined Sync SRAM

Functional Description[1] The CY7C1339F SRAM integrates 131,072 x 32 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-triggered Clock Input (CLK). Features •

文件:418.72 Kbytes 页数:17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

详细参数

  • 型号:

    CY7C1339F

  • 制造商:

    Cypress Semiconductor

  • 功能描述:

    SRAM Chip Sync Single 3.3V 4M-Bit 128K x 32 4.5ns 100-Pin TQFP

供应商型号品牌批号封装库存备注价格
24+
TQFP
6980
原装现货,可开13%税票
询价
CY
24+
QFP
314
询价
CYPRESS
05+
QFP
136
询价
CYPRESS
2016+
QFP
6000
只做原装,假一罚十,公司可开17%增值税发票!
询价
CYRESS?
23+
TQFP
3600
绝对全新原装!现货!特价!请放心订购!
询价
Cypress
16+
原厂封装
10000
全新原装正品,代理优势渠道供应,欢迎来电咨询
询价
CYPRESS
22+
QFP
5000
原装现货库存.价格优势!!
询价
CYPRESS
23+
BGAQFP
8659
原装公司现货!原装正品价格优势.
询价
CYPRESS/赛普拉斯
23+
QFP
1668
原装正品代理渠道价格优势
询价
CYPRESS/赛普拉斯
2447
QFP
100500
一级代理专营品牌!原装正品,优势现货,长期排单到货
询价
更多CY7C1339F供应商 更新时间2025-12-16 10:48:00