1-Mbit (64K x 18) Pipelined DCD Sync SRAM

文件：332 Kbytes 页数：15 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1-Mbit (64K x 18) Pipelined DCD Sync SRAM

文件：332 Kbytes 页数：15 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1-Mbit (64K x 18) Pipelined DCD Sync SRAM

Functional Description[1] The CY7C1298H SRAM integrates 64K x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. Features • Registered inputs and outputs for pipelined operation • Optimal for performance (Double-Cycle deselect)

文件：383.79 Kbytes 页数：16 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

64K x 18 Synchronous Burst RAM Pipelined Output

Functional Description The Cypress Synchronous Burst SRAM family employs high-speed, low-power CMOS designs using advanced double-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high valued resistors. Features • Fast access times: 5, 6, 7,

文件：165.45 Kbytes 页数：12 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司