1-Mbit (32K x 36) Flow-Through Sync SRAM

Functional Description[1] The CY7C1217F is a 32,768 x 36 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：322.12 Kbytes 页数：14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1-Mbit (32K x 36) Flow-Through Sync SRAM

Functional Description[1] The CY7C1217F is a 32,768 x 36 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 7.5 ns (117-MHz version). A 2-bit on-chip counter captures the first address in a burst and increme

文件：322.12 Kbytes 页数：14 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1-Mbit (32K x 36) Flow-Through Sync SRAM

Infineon

英飞凌

1-Mbit (32K x 36) Flow-Through Sync SRAM

Functional Description[1] The CY7C1217H is a 32K x 36 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increments

文件：386.09 Kbytes 页数：16 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司