CY7C109B-12ZC中文资料赛普拉斯数据手册PDF规格书

Functional Description[1]

The CY7C109B/CY7C1009B is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Output Enable (OE), and tri-state drivers. Writing to the device is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).

特性 Features

• High speed

— tAA = 12 ns

• Low active power

— 495 mW (max.)

• Low CMOS standby power

— 11 mW (max.) (L Version)

• 2.0V Data Retention

• Automatic power-down when deselected

• TTL-compatible inputs and outputs

• Easy memory expansion with CE1, CE2, and OE options

• CY7C109B is available in standard 400-mil-wide SOJ and 32-pin TSOP type I packages. The CY7C1009B is available in a 300-mil-wide SOJ package