CY7C109-35VI中文资料赛普拉斯数据手册PDF规格书

Functional Description

The CY7C109 / CY7C1009 is a high-performance CMOS stat ic RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), an active LOW output enable (OE), and three-state drivers. Writing to the device is accomplished by taking chip enable one (CE1) and write enable (WE) inputs LOW and chip enable two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking chip enable one (CE1) and output enable (OE) LOW while forcing write enable (WE) and chip enable two (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

特性 Features

• High speed

— tAA = 10 ns

• Low active power

— 1017 mW (max., 12 ns)

• Low CMOS standby power

— 55 mW (max.), 4 mW (Low power version)

• 2.0V Data Retention (Low power version)

• Automatic power-down when deselected

• TTL-compatible inputs and outputs

• Easy memory expansion with CE1, CE2, and OE options