High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

文件：103.05 Kbytes 页数：10 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

High-Frequency Programmable PECL Clock Generator

Introduction The CY2213 has a two-wire serial interface designed for data transfer operations, and is used for programming the P and Q values for frequency generation. Sclk is the serial clock line controlled by the master device. Sdata is a serial bidirectional data line. The CY2213 is a slave d

文件：103.05 Kbytes 页数：10 Pages

CYPRESSCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

SOIC-8

Cypress(赛普拉斯)

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SOP

CYPRESS/赛普拉斯

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SOP

CYPRESS/赛普拉斯

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