One-Touch Locking Style Small Sized Circular Connectors

文件：200.66 Kbytes 页数：3 Pages

DDK

One-Touch Locking Styled , Small Sized Circular Connectors

文件：1.26783 Mbytes 页数：4 Pages

DDK

One-Touch Locking Styled , Small Sized Circular Connectors

文件：1.26783 Mbytes 页数：4 Pages

DDK

One-Touch Locking Styled , Small Sized Circular Connectors

文件：1.26783 Mbytes 页数：4 Pages

DDK

丝印：CM093B；Package：TSSOP；CMOS Quad 2-Input NAND Schmitt Triggers

Features: ® Schmitt-trigger action on each input with no external components ® Hysteresis voltage typically 0.9 V at Vpp=5Vand 23 Vat Vpp=10V ® Noise immunity greater than 50% ® No limit on input rise and fall times ® Standardized, symmetrical output characteristics ® 100&#

文件：1.02303 Mbytes 页数：21 Pages

TI

德州仪器

丝印：CM093B；Package：TSSOP；CMOS Quad 2-Input NAND Schmitt Triggers

Features: ® Schmitt-trigger action on each input with no external components ® Hysteresis voltage typically 0.9 V at Vpp=5Vand 23 Vat Vpp=10V ® Noise immunity greater than 50% ® No limit on input rise and fall times ® Standardized, symmetrical output characteristics ® 100&#

文件：1.02303 Mbytes 页数：21 Pages

TI

德州仪器

丝印：CM093B；Package：TSSOP；CMOS Quad 2-Input NAND Schmitt Triggers

Features: ® Schmitt-trigger action on each input with no external components ® Hysteresis voltage typically 0.9 V at Vpp=5Vand 23 Vat Vpp=10V ® Noise immunity greater than 50% ® No limit on input rise and fall times ® Standardized, symmetrical output characteristics ® 100&#

文件：1.02303 Mbytes 页数：21 Pages

TI

德州仪器

丝印：CM094B；Package：TSSOP；CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CM094B；Package：TSSOP；CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器

丝印：CM094B；Package：TSSOP；CMOS 8-Stage Shift-and-Store Bus Register

Features: 3-state parallel outputs for connection to common bus Separate serial outputs synchronous to both positive and negative clock edges for cascading Medium speed operation — 5 MHz at 10 V (typ.) Standardized, symmetrical output characteristics 100% tested for quiescent curren

文件：924.5 Kbytes 页数：19 Pages

TI

德州仪器